Teledyne-lecroy QPHY-DDR4 Instrukcja Użytkownika

QPHY-DDR4 Operator’s Manual Revision A – June, 2014 Relating to the Following Release Versions: • Software Version Rev. 7.4 • DDR4

Oscilloscope Option Key Installation The required option keys must be purchased to enable the QPHY-DDR4 compliance tests. If you do not have the requ

QPHY-DDR4 Software Option QualiPHY tests the oscilloscope connection after clicking the Start button. The system prompts you if there is a connectio

Figure 4 - QualiPHY configuration selection menu 6. Click Start. 7. Follow the pop-up window prompts. 12 924291 Rev A

QPHY-DDR4 Software Option Customizing QualiPHY The predefined configurations in the Configuration screen cannot be modified. However, you can create

Creating Custom Configurations Beginning with any of the pre-loaded configurations, 1. Click on the Test Selector tab to change what tests you woul

QPHY-DDR4 Software Option Figure 6 - Variable Setup and Limits Manager windows 924291 Rev A 15

QPHY-DDR4 OPERATION After pressing Start in the QualiPHY menu, the software instructs how to set up the test using pop-up connection diagrams and dia

QPHY-DDR4 Software Option QPHY-DDR4 Measurement Preparation Deskewing the Probes For DDR measurements it is crucial to make sure the probes are prope

Once everything is properly set up the oscilloscope display should look similar to the figure below. If there was no propagation delay due to the pro

QPHY-DDR4 Software Option Connecting the Probes Determining Signals to Access The required signals to probe depend up on which tests are being run in

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R/W Burst Generation QPHY-DDR4 recommends to have a minimum of 10 R and 10 W bursts during each acquisition but for greater statistical significance

QPHY-DDR4 Software Option Initial Signal Checking Before running QPHY-DDR4 the user should have a quick look at their signals to verify that they mak

Presence of R/W Burst The operator should do a quick check to make sure their device is outputting the expected bursts. As a general rule of thumb, d

QPHY-DDR4 Software Option QPHY-DDR4 Test Configurations Configurations include variable settings and limit sets as well, not just test selections. Se

QPHY-DDR4 Variables Custom Speed Grade in MT/s This variable allows the user to define a custom speed grade to be used. This speed grade is used to s

QPHY-DDR4 Software Option DQS_c Signal Name This variable allows the user to assign a name to the DQS_c signal to appear in the test report and scree

Demo Settings These variables must be adjusted if the user wishes to run QPHY using saved waveforms. Use Stored Waveforms When enabled QPHY will run

QPHY-DDR4 Software Option Advanced Settings - Custom Levels Standard, Custom or Auto Levels This variable allows the user to use either Standard, Cus

Probe Setup: CKdiff These variables control the probe setup for the configuration using a differential clock (CK) only. Jitter BER Level This variabl

QPHY-DDR4 Software Option QPHY-DDR4 Test Descriptions Clock Tests (Ck Diff) There are 8 tests run in this group. The tests that are run are: 1. tCK(

QPHY-DDR4 Software Option TABLE OF CONTENTS Introduction to Qualiphy DDR4 ...

After the completion of the tCK, tCH, tCL, and tJIT(duty) tests the oscilloscope is in the following configuration: Figure 14 - Oscilloscope Configu

QPHY-DDR4 Software Option Figure 15 - tCK, tCH, tCL and tJIT(duty) Results In the Measure section: • tCK rise (P1) is the period measurement at Vref

• tJIT(CL) (P6) subtracts the mean of P4 (tCL(avg)) from all of the tCL values. The minimum value is the measured value for tJIT(CL), min and the max

QPHY-DDR4 Software Option Shown on this screen: • RjBUjSpect is the RjBUj Spectrum of the differential clock signal. The signal type on the signal in

Figure 18 - Oscilloscope Configuration after tJIT(cc)_total and tJIT(cc)_dj Tests Shown on this screen: • RjBUjSpect is the RjBUj Spectrum of the di

QPHY-DDR4 Software Option There are 12 different tests: tERR(2per), tERR (3per), tERR (4per), tERR (5per), tERR(6per), tERR (7per), tERR (8per), tER

Figure 21 - tERR(2per), tERR (3per), tERR (4per), and tERR (5per) Results In the Measure section: • tCK rise (P1) is the period measurement at Vref

QPHY-DDR4 Software Option • tERR(3 per) fall (P8) is the TIE measure at Vref (0 mV) of Z1 (differential clock signal) on only the falling edges (nega

Eye Diagram Tests (CKdiff-DQSdiff-DQse) There are 5 tests run in this group. The tests that are run are: Eye Diagrams on W bursts 1. Write Bursts (

QPHY-DDR4 Software Option contained in the eye diagram is displayed in the bottom row of the F6 descriptor box. In this case there are 5,136 DQS bits

TABLE OF FIGURES Figure 1 - Report menu in QualiPHY General Setup... 8 F

Figure 24 - DQ Input Compliance Mask Results In the Measure section: • tBurst W (P2) displays the number of W bursts detected in the acquisition. •

QPHY-DDR4 Software Option In the Measure section: • tBurst W (P2) displays the number of W bursts detected in the acquisition. • ClockFreq (P8) is th

In the Measure section: • tBurst R (P2) displays the number of R bursts detected in the acquisition. • ClockFreq (P8) is the measured clock frequenc

QPHY-DDR4 Software Option Electrical Tests (CKdiff-DQSdiff-DQse) The electrical tests will be discussed in 4 groups in this section. The groups of te

After the completion of the SRIN_dIVW_R test the oscilloscope is in the following configuration: Figure 29 - Oscilloscope Configuration after SRIN_

QPHY-DDR4 Software Option In the Measure section: • SRIN_dIVWR (P1) is measuring the slew rate of DQ on the rising edges. The slew rate is measured a

• Z3 is a zoom of F3, the acquired DQ signal after any probe deskew has been applied. The zoom is position at the location of the “worst case” Slew_R

QPHY-DDR4 Software Option tDVAC, Time Above AC Level The purpose of this test is to verify the allowed time before ringback for the differential CK s

• tDQDQS (P2) is measuring the skew between DQ and DQS. Since this measurement is performed once per burst, this shows how many W bursts were in the

QPHY-DDR4 Software Option Shown on this screen: • Z2 is a zoom of F2, the acquired DQS signal after any probe deskew has been applied. The zoom is po

QPHY-DDR4 Software Option Figure 53 - Oscilloscope Configuration after the tDQSS test ...

Area After the completion of the Overshoot Area test the oscilloscope is in the following configuration: Figure 37 - Oscilloscope Configuration aft

QPHY-DDR4 Software Option Figure 38 – Overshoot/Undershoot Results In the Measure section: • OvershootArea (P1) is measuring the overshoot peak ampl

After the completion of the SRQ test the oscilloscope is in the following configuration: Figure 39 - Oscilloscope Configuration after the SRQ test S

QPHY-DDR4 Software Option In the Measure section: • SRQ R (P1) is measuring the slew rate of DQ on the rising edges. The slew rate on the rising edge

Figure 41 - Oscilloscope Configuration after the tDQSQ_total test Shown on this screen: • Z2 is a zoom of F2, the acquired DQS signal after any pro

QPHY-DDR4 Software Option tQSH/tQSL, DQS Output High/Low Time These tests measure the high time (tQSH) and low time (tQSL) for each valid DQS transit

Vref. The minimum value is the measured value for tQSH min reported in mUI. This test is considered informational only since the limit is undefined.

QPHY-DDR4 Software Option In the Measure section: • tQH (P1) is measuring the hold time of DQ. The hold time is determined by measuring the time from

t@tDQSCKmax. A trace label is applied at Vref on this trace according to the signal name assigned to DQS. Figure 48 – tDQSCK Results In the Measure

QPHY-DDR4 Software Option tHZ/tLZ, High/Low Impedance Time The purpose of this test is to characterize the High and Low Impedance times. These tests

Introduction to Qualiphy DDR4 QPHY-DDR4 is an automated test package performing all of the real time oscilloscope in accordance with JEDEC Standard N

interpolation algorithm has determined where the device is no longer driving. This is the signal which is measured in this test. Figure 50 – tHZ/tLZ

QPHY-DDR4 Software Option tRPRE/tRPST, Read Pre/Postamble Time The purpose of these tests are to characterize the Preamble and Postamble times during

In the Measure section: • tRPRE (P1) is measuring the time from when time DQS quits driving to the next rising edge on DQS at Vref. The idle quit tim

QPHY-DDR4 Software Option • Z2 is a zoom of F2, the acquired DQS signal after any probe deskew has been applied. The zoom is positioned at the locati

tDQSH/tDQSL, DQS Input High/Low Pulse Width These tests measure the high (tDQSH) and low (tDQSL) pulse widths of each DQS signal during a W burst. Bo

QPHY-DDR4 Software Option In the Measure section: • tDQSH (P1) is measuring the high time of DQS. The high time is determined by measuring the time D

Figure 58 – tDIPW Results In the Measure section: • tDIPW (P1) is measuring the high time of DQS. The high time is determined by measuring the time

QPHY-DDR4 Software Option Shown on this screen: • Z1 is a zoom of F1, the acquired CK signal after any probe deskew has been applied. The zoom is pos

Tdqs/Tdqh, DQ to DQS Setup/Hold Time The purpose of this test is to characterize the setup and hold time between DQ and DQS on W bursts. The maximum

QPHY-DDR4 Software Option In the Measure section: • Tdqs (P1) is measuring the setup time from when the rising edge on DQ crosses Vref + (0.5*VdiVW)

QPHY-DDR4 Software Option Using Qualiphy DDR4 QualiPHY DDR4 guides the user, step-by-step, through each of the tests in conformance with the JEDEC DD

Shown on this screen: • Z2 is a zoom of F2, the acquired DQS signal after any probe deskew has been applied. The zoom is positioned at the location o

QPHY-DDR4 Software Option Appendix A: File name conventions for saved waveforms QPHY-DDR4 saves the waveforms from each acquisition using a specific

Appendix B: Common WaRning Messages Clock Speed Grade At the beginning of each run QPHY measures the clock speed. This is used to verify that the ap

QPHY-DDR4 Software Option DUT Name When running in Demo mode QPHY will prompt a warning if the DUT name is not “Demo”. The DUT name entered should m

QualiPHY Compliance Test Platform QualiPHY is Teledyne LeCroy’s compliance test framework which leads the user through the compliance tests. QualiPH

QPHY-DDR4 Software Option Figure 2 - The Test Report includes a summary table with links to the detailed test results 924291 Rev A 9